Math.asm file Updated: March 1, 1999 by John Maters Any of the following subroutines may be placed in the user's source code and subsequently called when a computation is required. The macros called in these subroutines (i.e. UMUL****L, UDIV****L) are contained within a file called "MATH.INC" available from the T.A. or directly from Microchip's website (www.microchip.com) in the AN617 (fixed point routines) application note. ;************************************************************************************ ; 8x8 Bit Unsigned Fixed Point Multiply 8x8 -> 16 ; Input: 8 bit unsigned fixed point multiplicand in AARGB0 ; 8 bit unsigned fixed point multiplier in BARGB0 ; Use: CALL FXM0808U ; Output: 16 bit unsigned fixed point product in AARGB0,AARGB1 ; Result: AARG <-- AARG x BARG ; Max Timing: 1+70+2 = 73 clks ; Min Timing: 1+53 = 54 clks ; PM: 1+19+1 = 21 DM: 4 FXM0808U CLRF ACCB1 UMUL0808L RETLW 0x00 ;************************************************************************************ ; 16x16 Bit Unsigned Fixed Point Multiply 16x16 -> 32 ; Input: 16 bit unsigned fixed point multiplicand in AARGB0,AARGB1 ; 16 bit unsigned fixed point multiplier in BARGB0,BARGB1 ; Use: CALL FXM1616U ; Output: 32 bit unsigned fixed point product in AARGB0,AARGB1,AARGB2,AARGB3 ; Result: AARG <-- AARG x BARG ; Max Timing: 6+248+2 = 256 clks ; Min Timing: 6+101 = 107 clks ; PM: 6+51+1 = 58 DM: 9 FXM1616U CLRF ACCB2 CLRF ACCB3 MOVF AARGB0,W MOVWF TEMPB0 MOVF AARGB1,W MOVWF TEMPB1 UMUL1616L RETLW 0x00 ;************************************************************************************ ; 16/8 Bit Unsigned Fixed Point Divide 16/8 -> 16.08 ; Input: 16 bit unsigned fixed point dividend in AARGB0,AARGB1 ; 8 bit unsigned fixed point divisor in BARGB0 ; Use: CALL FXD1608U ; Output: 16 bit unsigned fixed point quotient in AARGB0,AARGB1 ; 8 bit unsigned fixed point remainder in REMB0 ; Result: AARG, REM <-- AARG / BARG ; Max Timing: 1+291+2 = 294 clks ; Min Timing: 1+227+2 = 230 clks ; PM: 1+39+1 = 41 DM: 7 FXD1608U CLRF REMB0 UDIV1608L RETLW 0x00 ;************************************************************************************ ; 16/16 Bit Unsigned Fixed Point Divide 16/16 -> 16.16 ; Input: 16 bit unsigned fixed point dividend in AARGB0, AARGB1 ; 16 bit unsigned fixed point divisor in BARGB0, BARGB1 ; Use: CALL FXD1616U ; Output: 16 bit unsigned fixed point quotient in AARGB0, AARGB1 ; 16 bit unsigned fixed point remainder in REMB0, REMB1 ; Result: AARG, REM <-- AARG / BARG ; Max Timing: 2+369+2 = 373 clks ; Min Timing: 2+273+2 = 277 clks ; PM: 2+24+1 = 27 DM: 7 FXD1616U CLRF REMB0 CLRF REMB1 UDIV1616L RETLW 0x00 ;************************************************************************************ ; 23/15 Bit Unsigned Fixed Point Divide 23/15 -> 23.15 ; Input: 23 bit unsigned fixed point dividend in AARGB0,AARGB1,AARGB2 ; 15 bit unsigned fixed point divisor in BARGB0,BARGB1 ; Use: CALL FXD2315U ; Output: 23 bit unsigned fixed point quotient in AARGB0,AARGB1,AARGB2 ; 15 bit unsigned fixed point remainder in REMB0,REMB1 ; Result: AARG, REM <-- AARG / BARG ; Max Timing: 2+403+2 = 407 clks ; Min Timing: 2+375+2 = 379 clks ; PM: 2+117+1 = 120 DM: 7 FXD2315U CLRF REMB0 CLRF REMB1 UDIV2315L RETLW 0x00 ;*********************************************************************************** ; 32/16 Bit Unsigned Fixed Point Divide 32/16 -> 32.16 ; Input: 32 bit unsigned fixed point dividend in AARGB0,AARGB1,AARGB2,AARGB3 ; 16 bit unsigned fixed point divisor in BARGB0,BARGB1 ; Use: CALL FXD3216U ; Output: 32 bit unsigned fixed point quotient in AARGB0,AARGB1,AARGB2,AARGB3 ; 16 bit unsigned fixed point remainder in REMB0,REMB1 ; Result: AARG, REM <-- AARG / BARG ; Max Timing: 2+699+2 = 703 clks ; Max Timing: 2+663+2 = 667 clks ; PM: 2+240+1 = 243 DM: 9 FXD3216U CLRF REMB0 CLRF REMB1 UDIV3216L RETLW 0x00